1. The Field of the Invention
The present invention relates to the formation of a barrier layer on an integrated circuit during the fabrication thereof. More particularly, the present invention is directed to a process for depositing a metal oxide etch stop or diffusion barrier on a semiconductor substrate of an integrated circuit using MOCVD with ozone gas as an oxidant.
2. Background of the Invention
The movement toward the progressive miniaturization of semiconductor integrated circuits has resulted in increasingly compact and efficient semiconductor structures. This movement has been accompanied by an increase in the complexity and number of such structures aggregated on a single semiconductor integrated chip. As feature sizes are reduced, new problems arise which must be solved in order to economically and reliably produce the semiconductor devices that are situated upon semiconductor substrates. In the context of this document, the term “semiconductor substrate” is defined to mean any construction comprising semiconductive material, including but not limited to bulk semiconductive material such as a semiconductive wafer, either alone or in assemblies comprising other materials thereon, and semiconductive material layers, either alone or in assemblies comprising other materials. The term “substrate” refers to any supporting structure including but not limited to the semiconductor substrates described above. Including in the definition of semiconductor substrate are structures such as silicon-on-sapphire and silicon-on-insulator.
As an example, submicron features of the semiconductor devices in semiconductor manufacturing are now required and have necessitated the development of improved means of making contact with the various structures of the devices on the semiconductor substrate of the integrated circuit. The smaller and more complex devices are achieved, in part, by reducing feature sizes and spacing and by reducing the junction depth of regions formed in the semiconductor substrate. Among the features which are being reduced in size are the contact openings through which electrical contact is made to underlying active regions in the semiconductor devices. Another related feature being reduced in size is the via openings through which different structural layers on the integrated circuit are provided with electrical communication.
One problem that has arisen when making contact to the various isolated regions on an integrated circuit is controlling the selectivity with which a contact or via opening is etched. The goal in etching is to provide an opening that is of uniform width and that ends exactly to the surface of the region sought to be accessed without intruding upon the region. Unfortunately, the etchant materials have proven difficult to control, making it a challenge to prevent the resulting opening from being etched too widely or deeply.
A second problem that typically arises after the via or contact opening has been etched is that of preventing the metallization material from reacting with the underlying region to which is being provided electrical communication. Historically, device interconnections have been made with aluminum or aluminum alloy metallization. Aluminum, however, presents the problem of spiking at junctions when brought into contact with a silicon containing material. Junction spiking is the result of the dissolution of silicon into the aluminum metallization, as well as the dissolution of aluminum into the silicon containing material. Typically, when aluminum contacts the doped silicon of the region directly, the aluminum eutectically alloys with the silicon at temperatures as low or lower than 450° C. When such a reaction occurs, aluminum in the contact is often diffused into the silicon region from the contact, forming an alloy spike structure.
The resulting alloy spike structure is a sharp, pointed region enriched in aluminum. The alloy spikes can extend into the interior of the underlying silicon substrate from the boundary between the contact and the underlying region to cause unwanted short circuit conduction. This particularly occurs when the underlying region is a junction in an active semiconductor device and is formed in an extremely shallow region of the substrate. When such an unwanted conduction occurs, the semiconductor device no longer operates properly. This problem is exacerbated with smaller device sizes, because the more shallow junctions are easily shorted, and because the silicon available to alloy with the aluminum metallization is only accessed through the small contact or via area, increasing the resultant depth of the spike. Furthermore, silicon in the region is often dissolved into the aluminum electrode, and there is a tendency for silicon thus dissolved into the electrode to be precipitated at a boundary between the electrode and the region as an epitaxial phase. This increases the resistivity across the contact.
A related problem exists when a doped region of silicon exists adjacent an undoped region, or when other doped and undoped regions must be located next to each other. When a region of silicon dioxide is laid above a doped region, for example, the silicon dioxide has a tendency to react with the dopant, depleting the dopant of the active region. As a further example, when an undoped region such as a polysilicon gate in a transistor is to be covered by doped oxide layer such as borophosphorosilicate glass (BPSG), a problem of the polysilicon assimilating the dopant of the oxide layer can occur.
As a solution to the problem of maintaining selectivity of the etch, it is known to deposit an etch stop barrier above the region that is to be isolated. A contact 10 being formed with a typical etch stop structure is shown in FIG. 1. In the formation of contact 10, a discrete region 14 is first formed within a semiconductor substrate 12. A polysilicon layer 15 is then formed over discrete region 14. An oxide layer 16 is then formed over polysilicon layer 15. A layer of photoresist 18 is applied, exposed over discrete region 14, and developed. A contact or via opening 20 is then etched through a masked opening in photo resist layer 18, polysilicon layer 15, and oxide layer 16. An etch stop layer 22 is formed from materials selected to be impervious to the etchant, and that can later be selectively removed by processes that will not affect the region. Etch stop layer 22 is deposited over the exposed portion of region 14 through opening 20 region 14. Etch stop layer 22 directs the etching of oxide layer 16. Photoresist layer is removed by cleaning and contact or via opening 20 is then filled with a metallization material 24.
Etch stop layer 22 may be deposited using a number of techniques, one of which is to deposit an aluminum oxide film barrier layer by sputter deposition. An example of this process is taught in R. D. J. Verhaar et al., A 25 Micrometer Squared Bulk Full CMOS SRAM Cell Technology With Fully Overlapping Contacts, International Electronic Devices Meeting Digest, December 1990, which is incorporated herein by reference.
As a solution to the problems associated with the reaction between the silicon substrate and the metallization material in contact and via formation, prior art solutions have typically used a diffusion barrier structure in which the reaction between the silicon substrate and the electrode is blocked by the diffusion barrier layer. Such a barrier layer prevents the interdiffusion of silicon and aluminum.
FIG. 2 depicts one conventional method known in the art of forming contacts and vias having a diffusion barrier. A contact 30 is depicted that is formed with a diffusion barrier 38. In forming contact 30, a region 34 is formed on silicon substrate 32. Region 34 is typically an active area of a semiconductor device, such as that of a transistor. An oxide layer 36 is formed over region 34, and a contact opening 40 is etched through oxide layer 36 to region 34. Oxide layer 36 typically comprises a doped silicon dioxide such as borophosphorosilicate glass (BPSG). Contact opening 40 provides access to active region 34 by which an electrical contact is made. A barrier layer 38 is then deposited over contact opening 40 so that the exposed surface of active region 34 is coated. Barrier layer 38 is typically deposited by CVD or sputtering.
The next step is metallization. This is typically achieved by the deposition of a metallization layer 42 such as aluminum using one of the various known methods, including CVD, sputtering, and aluminum reflow. Barrier layer 38 acts as a barrier against the diffusion of metallization layer 42 into active region 34 and vice-versa. When used in a via opening the process is essentially the same as that for forming a contact, as discussed above. FIG. 3 shows a second type of diffusion barrier used for separating adjacent regions on an integrated circuit. In FIG. 3, a doped polysilicon gate structure 54 is isolated from an underlying silicon substrate 52 and an overlying oxide layer 56 by a diffusion barrier 58.
Many choices of materials to form barriers are known in the art. One type of barrier layer that is used is formed from metal oxide ceramic compounds. See Verhaar et al., above. Layers formed from such compounds are used as both etch stop and diffusion barriers. They are removed after layering with chemical etchant processes. The difficulty with using metal oxide ceramic compounds as a barrier layer arises in deposition of the material. In sputter deposition, the targets are expensive to provide, and it has been found that sputter depositing does not provide adequate step coverage for increasingly small contact and via openings.
Another method of forming barrier layers with metal oxide ceramic compounds that has been tried in the past is chemical vapor deposition using organometallic source materials (MOCVD). When using this process, a source such as dimethyl aluminum hydrate is reacted with diatomic oxygen gas at high temperatures to form a metal oxide solid such as aluminum oxide, substantially in the form Al2O3. The other reaction products are carried away in the form of gases such as dimethyl hydrate H(CH4)2, CO or CO2, and diatomic hydrogen.
The MOCVD method has several inherent drawbacks. For instance, it has proven difficult to provide even step coverage of contact and via openings with this process. At high temperatures the source gas exhibits a low thermal surface mobility lifetime in that the organometallic source gas decomposes and reacts with the sides of the opening before reaching the bottom of the opening. This is a result of the high temperatures that are necessary to oxidize the source gas with diatomic oxygen gas. As a consequence, the openings must be formed with lower aspect ratios, hindering miniaturization efforts.
Another problem inherent to MOCVD barrier layer formation is the entrapment of carbon in the aluminum oxide film. The carbon reacts slowly with the diatomic oxygen gas, and layers of aluminum oxide are deposited over the carbon before it can be volatilized and carried away. Due to the trapping of carbon molecules and the incomplete reaction of the carbon, the barrier layer takes on the characteristics of aluminum carbide, which typically does not function as an etch stop barrier. Consequently, the resultant barrier has an inability to maintain selectivity and resistance to diffusion. The resultant barrier becomes compromised by the formation of pinholes at the locations where the carbon has been entrapped. The etchant or metallization material is then able to penetrate the resultant barrier layer due to the pinholes.
From the foregoing discussion, it can be seen that it would be an advance in the art to provide a process of forming an effective etch stop or diffusion barrier layer in an effective form, such as a metal oxide barrier layer. Such a process would be beneficial if metal oxide barrier layers can be formed with good step coverage, without entrapped carbon, and without the use of expensive targets known to sputter deposition processing.